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"PDIP" redirects here. PDIP may also refer to Indonesian Democratic Party – Struggle. Three 14-pin (DIP14) plastic dual in-line packages containing IC chips. Sockets for 16-, 14-, and 8-pin packages. In microelectronics, a dual in-line package (DIP), sometimes called a DIL-package (for Dual In Line-package),[1] is an electronic device package with a rectangular housing and two parallel rows of electrical connecting pins. The pins are all parallel, point downward, and extend past the bottom plane of the package at least enough to be through-hole mounted to a printed circuit board (PCB), i.e. to pass through holes on the PCB and be soldered on the other side. DIP is sometimes incorrectly considered to stand for dual in-line pin, in an effort to justify the redundant term "DIP package" (Dual in-line pin would imply one line of two pins). Generally, a DIP is relatively broadly defined as any rectangular package with two uniformly spaced parallel rows of pins pointing downward, whether it contains an IC chip or some other device(s), and whether the pins emerge from the sides of the package and bend downwards or emerge directly from the bottom of the package and are completely straight. In more specific usage, the term refers only to an IC package of the former description (with bent leads at the sides.) A DIP is usually referred to as a DIPn, where n is the total number of pins. For example, a microcircuit package with two rows of seven vertical leads would be a DIP14. The photograph at the upper right shows three DIP14 ICs. Contents 1 Applications 1.1 Types of devices 1.2 Uses 1.3 Mounting 2 Construction 2.1 Variants 2.2 Lead count and spacing 3 Orientation and lead numbering 4 Descendants 5 History 6 See also 7 References 8 External links // Applications Types of devices An operating prototyped circuit incorporating four DIP ICs, a DIP LED bargraph display (upper left), and a DIP 7-segment LED display (lower left). DIPs may be used for semiconductor integrated circuits (ICs, "chips"), like logic gates, analog circuits, and microprocessors, which is by far their most common use. They may also be used for other types of devices including arrays of discrete components such as resistors (often called resistor packs), arrays of miniature rocker or slide switches known as DIP switches, various LED arrays including segmented and bargraph displays and light bars, miniature rotary encoder switches, and electromechanical relays. Integrated circuits and resistor arrays usually have bent leads (leads are one type of IC package connector; other types are pins, and more recently balls) which extend from the sides of the package and turn to point downward; the IC packages tend to be black, and DIP resistor networks tend to be dark yellow or white plastic. The other types of DIP components, particularly LED devices, usually have completely straight leads extending directly from the bottom/back of the package, which is usually molded plastic and can be any color. DIP plugs for ribbon cable, to connect to DIP sockets, have also been made (and can be found in some Apple II computers, as well as on some electronics test equipment used by technicians.) Dallas Semiconductor manufactured integrated DIP real-time clock (RTC) modules which contained an IC chip and a non-replaceable 10-year lithium battery. Both of these were examples of devices with leads emerging from the bottom; the construction of the RTC modules was very similar to the LED displays described below, with epoxy in a plastic shell. The RTC modules are an example of a component that could not be easily converted to surface-mount, as their size and weight with the contained battery would push the limits of mechanical strength of surface solder pads, and the thicker leads of a DIP as compared to most SMT packages were probably necessary to mechanically support the battery. Dallas also sold the same RTC chips without a battery in standard side-lead DIP packages; both versions would physically fit the same DIP sockets. Some older equipment (circa the 1970s) used DIP terminal blocks onto the top of which discrete components could be soldered; these blocks (typically DIP16 size) would then be plugged into sockets on circuit boards and could be easily removed and swapped out, or test equipment connected between them and their sockets, for repair or testing of the machines they were a part of. These saw use mainly in industrial, commercial, and prototype equipment, not consumer electronics. Uses Dual in-line packages were invented at Fairchild in 1965 and, by allowing integrated circuits to be packaged more densely than previous round packages did, made it possible to build complex systems such as sophisticated computers.[2] The package was well-suited to automated assembly equipment; a printed circuit board could be populated with scores or hundreds of ICs, then have all devices soldered at once (e.g. on a wave soldering machine) and passed on to automated testing machines, with very little human labor required. However, the packages were still large with respect to the integrated circuits within them. By the end of the 20th century, most ICs were packaged in surface-mount packages, which allowed further reduction in the size and weight of systems. DIP chips are still popular for circuit prototyping on a breadboard because of how easily they can be inserted and utilized there. DIPs were the mainstream of the microelectronics industry in the 1970s and 80s. Their use has declined in the first decade of the 21st century due to the emerging new surface-mount technology (SMT) packages such as plastic leaded chip carrier (PLCC) and small-outline integrated circuit (SOIC), though DIPs continued in extensive use through the 1990s, and still continue to be used substantially as the year 2010 passes. Because some modern chips are available only in surface-mount package types, a number of companies sell various prototyping adapters to allow those SMT devices to be used like DIP devices with through-hole breadboards and soldered prototyping boards (such as stripboard and perfboard). (SMT can pose quite a problem, at least an inconvenience, for prototyping in general; most of the characteristics of SMT that are advantages for mass production are difficulties for prototyping.) For programmable devices like EPROMs and GALs, DIPs remained popular for many years due to their easy handling with external programming circuitry (i.e., the DIP devices could be simply plugged into a socket on the programming device.) However, with In-System Programming (ISP) technology now state of the art, this advantage of DIPs is rapidly losing importance as well. Through the 1990s, devices with lead counts below 20 were manufactured in a DIP format in addition to the newer formats. Since about 2000, newer devices are often unavailable in the DIP format, though many still are. Mounting DIPs can be mounted on a circuit board either directly using through-hole soldering or using inexpensive spring-contact sockets. Using a DIP socket allows for easy replacement of a device and eliminates the risk of damage from overheating during soldering (as the device is inserted into the soldered socket only after it has cooled.) These are by far the most common mounting types for DIP components. DIPs can also be easily and conveniently used with standard protoboards/breadboards, whose design includes extensive consideration for them; this is a temporary mounting arrangement for circuit design development or device testing. Some hobbyists, for one-off construction or permanent prototyping, use point-to-point wiring with DIPs, and their appearance when physically inverted as part of this method inspires the informal term "dead bug style" for the method. Construction Side view of a dual in-line package (DIP) IC. The body (housing) of a DIP containing an IC chip is usually made from molded plastic or ceramic. The hermetic nature of a ceramic housing is preferred for extremely high reliability devices. However, the vast majority of DIPs are manufactured via a thermoset molding process in which an epoxy mold compound is heated and transferred under pressure to encapsulate the device. Typical cure cycles for the resins are less than 2 minutes and a single cycle may produce hundreds of devices. The leads emerge from the longer sides of the package along the seam, parallel to the top and bottom planes of the package, and are bent downward approximately 90 degrees (or slightly less, leaving them angled slightly outward from the centerline of the package body.) (The SOIC, the SMT package that most resembles a typical DIP, appears essentially the same, notwithstanding size scale, except that after being bent down the leads are bent upward again by an equal angle to become parallel with the bottom plane of the package.) In ceramic (CERDIP) packages, an epoxy or grout is used to hermetically seal the two halves together, providing an air and moisture tight seal to protect the IC die inside. Plastic DIP (PDIP) packages are usually sealed by fusing or cementing the plastic halves around the leads, but a high degree of hermeticity is not achieved because the plastic itself is usually somewhat porous to moisture and the process cannot ensure a good microscopic seal between the leads and the plastic at all points around the perimeter. However, contaminants are usually still kept out well enough that the device can operate reliably for decades with reasonable care in a controlled environment. Inside the package, the lower half has the leads embedded, and at the center of the package is a rectangular space, chamber, or void into which the IC die is cemented. The leads of the package extend diagonally inside the package from their positions of emergence along the periphery to points along a rectangular perimeter surrounding the die, tapering as they go to become fine contacts at the die. Ultra-fine bond wires (barely visible to the naked human eye) are welded between these die periphery contacts and bond pads on the die itself, connecting one lead to each bond pad, and making the final connection between the microcircuits and the external DIP leads. The bond wires are not usually taut but loop upward slightly to allow slack for thermal expansion and contraction of the materials; if a single bond wire breaks or detaches, the entire IC may become useless. The top of the package covers all of this delicate assemblage without crushing the bond wires, protecting it from contamination by foreign materials. Semiconductor materials must be ultra pure, and doping (the controlled addition of impurities) must be very precise, to make a working device, so the slightest chemical contamination must be avoided. Usually, a company logo, alphanumeric codes and sometimes words are printed on top of the package to identify its manufacturer and type, when it was made (usually as a year and a week number), sometimes where it was made, and other proprietary information (perhaps revision numbers, manufacturing plant codes, or stepping ID codes.) (In contrast, most SMT packages, because of their micro-miniature size, bear very little printed information, usually just four- or eight-character codes identifying their functional type.) The necessity of laying out all of the leads in a basically radial pattern in a single plane from the die perimeter to two rows on the periphery of the package is the main reason that DIP packages with higher lead counts must have wider spacing between the lead rows, and it effectively limits the number of leads which a practical DIP package may have. Even for a very small die with many bond pads (e.g. a chip with 15 inverters, requiring 32 leads), a wider DIP would still be required to accommodate the radiating leads internally. This is one of the reasons that four-sided and multiple rowed packages, such as PGAs, were introduced (around the early 1980s.) Also, a large DIP package (such as the DIP64 used for the Motorola 68000 CPU) incorporates substantial lead length inside the package between the leads located toward the ends of the package and the chip die at its center, making such a package unsuitable for high-speed microarchitectures (above a few hundred megahertz), which require lead length to be kept to a minimum. The 68000 ran at no more than 20 MHz, so this was not an issue for it. Some other types of DIP devices are built very differently. Most of these have molded plastic housings and straight leads or leads that extend directly out of the bottom of the package. For some, LED displays particularly, the housing is usually a hollow plastic box with the bottom/back open, filled (around the contained electronic components) with a hard translucent epoxy material from which the leads emerge. Others, such as DIP switches, are composed of two (or more) plastic housing parts snapped, welded, or glued together around a set of contacts and tiny mechanical parts, with the leads emerging through molded-in holes or notches in the plastic. Variants Several PDIPs and CERDIPs. The large CERDIP in the foreground is an Intel 8080 microprocessor. Several DIP variants for ICs exist, mostly distinguished by packaging material: Ceramic Dual In-line Package (CERDIP or CDIP) Plastic Dual In-line Package (PDIP) Shrink Plastic Dual In-line Package (SPDIP) – A denser version of the PDIP with a 0.07 in. (1.778 mm) lead pitch. Skinny Dual In-line Package (SDIP or SPDIP[3]) – Sometimes used to refer to a 0.3 in. wide DIP, normally when clarification is needed e.g. for a 24 or 28 pin DIP. For EPROMs, which can be erased by UV light, some DIPs, generally ceramic CERDIPs, were manufactured with a circular window of clear quartz in the center of the top of the package, over the chip die. This enabled the packaged chips to be erased by UV irradiation in an EPROM eraser. Often, the same chips were also sold in less expensive windowless PDIP or CERDIP packages as one-time programmable (OTP) versions. (These were actually the same erasable chips, but there was no way to get UV radiation to them to erase them.) The same windowed and windowless packages were also used for microcontrollers, and perhaps other devices, containing EPROM memory; in this context, the OTP nature of the windowless versions was sometimes a needed requirement of the customer (i.e., to prevent their end users from modifying the stored information, which might include access control bits to disable read-out of proprietary code or factory test modes which were disabled after final test qualification.) Windowed CERDIP-packaged PROMs were used for the BIOS ROM of many early IBM PC clones (which were manufactured in limited enough quantities to make PROM an economical choice) often with a foil-backed (or regular paper) adhesive label covering the window to prevent inadvertent erasure through exposure to ambient light. Lead count and spacing Commonly found DIP packages that conform to JEDEC standards use an inter-lead spacing (lead pitch) of 0.1 inch (2.54 mm). Row spacing varies depending on lead counts, with 0.3 in. (7.62 mm) or 0.6 inch (15.24 mm) the most common. Less common standardized row spacings include 0.4 inch (10.16 mm) and 0.9 inch (22.86 mm), as well as a row spacing of 0.3 inch, 0.6 inch or 0.75 inch with a 0.07 inch (1.778 mm) lead pitch. The former Soviet Union and Eastern bloc countries used similar packages, but with a metric inter-lead spacing of 2.5 mm rather than 2.54 mm (0.1 inch). The number of leads is always even. For 0.3 inch spacing, typical lead counts are 8 to 24; less common are 4 or 28 lead counts. For 0.6 inch spacing, typical lead counts are 24, 28, 32 or 40; less common are 36, 48 or 52 lead counts. Some microprocessors, such as the Motorola 68000 and Zilog Z180, used lead counts as high as 64; this is typically the maximum number of leads for a DIP package.[4] Orientation and lead numbering Pin numbering is counter-clockwise. When a DIP is viewed from the top with the in-line lead rows horizontal and the orientation indicator on the left side, the leads are sequentially numbered counterclockwise, with lead numbers increasing from left to right across the bottom edge and from right to left across the top edge. Finding any given lead is simply a matter of finding lead 1 and then counting counterclockwise. Because the dual-inline lead arrangement has radial symmetry, the layout looks the same if the package is rotated 180 degrees; therefore, to resolve this ambiguity, one end of every DIP is marked with an orientation notch, a dot, or both. The notch is centered between the lead rows and may extend all the way through the end of the package or may be just cut into the top of the end, but it is almost always present. The dot will be on top of the corner of the package at the same end as the notch, if both are present, and it will usually be a molded depression, though it may be raised or even, rarely (except for ceramic packages), merely a printed mark. When the package is viewed from the top side, lead 1 is the lead at the corner with the dot, or it is the lead counterclockwise from the notch (that is, counterclockwise around the center of the package). Lead 1 is always in the same inline row as lead 2. Merely knowing that lead 1 is a corner lead on the notched or dotted end, that leads 1 and 2 are always adjacent in the same inline row of leads, and that the lead numbering is always counterclockwise is sufficient to figure out the numbers of all the leads for any DIP package. Another way to remember the numbering, also sufficient for all DIPs, is that lead 1 and the highest numbered leads are the two corner leads at the notched and/or dotted end, and that the lead numbering is counterclockwise. By either of these rule sets, if lead 1 is misidentified at the wrong corner of the marked end, it is impossible to number the leads counterclockwise with increasing numbers. Using basic math and logic, it can be concluded that for a package with any number of leads n (where n is always even, of course), if lead 1 is at the lower left corner (which implies that the lead rows are horizontal), then the bottom row is numbered 1 to n / 2 from left to right, and the top row is numbered n / 2 + 1 to n from right to left. So, for example, for a 14-lead DIP, n = 14 and n / 2 = 7; with the notch at the left, the bottom row leads are numbered from 1 to 7 (left to right) and the top row leads are numbered 8 to 14 (right to left). The diagram at the right above shows the DIP package rotated 90 degrees clockwise relative to this description (with lead 1 at the upper left instead of the lower left and the lines of leads vertical columns instead of horizontal rows), so the left column is numbered 1 to n / 2 from top to bottom, and the right column is numbered n / 2 + 1 to n from bottom to top. Some DIP devices, such as segmented LED displays, have some lead positions skipped (i.e. leads omitted). In that case, often the existing leads will still be numbered according to the corresponding positions on a standard DIP that has no gaps in the lead rows, so the numbers of the present leads will not be contiguous. This makes it easier for experienced engineers and technicians to identify leads on these devices using their knowledge of DIP lead numbering, though it may be initially confusing for amateur hobbyists, who may expect the physical leads of every device to be numbered sequentially. This highlights an important point: when naming a package according to the number of leads, e.g. DIP14, the number should be chosen not according to the number of actual leads but according to the number of lead positions on the package, or, in other words, according to the size of the standard DIP socket that the package will fit into. So, a 7-segment LED display with ten leads arranged in two rows 7 x 0.1 in. long and 0.3 in. apart (which leaves two missing lead-spaces on each side) would fit a DIP14 socket, but not a DIP12 or DIP10 socket, and therefore it should be identified as a DIP14; it has ten leads but 14 lead positions. In addition to providing for human visual identification of the orientation of the package, the notch allows automated chip-insertion machinery to ensure correct orientation of the chip by mechanical sensing. A physical notch is also more durable than a printed mark, as it cannot wear off or fade, and, no less, it gains this benefit at a small saving of some material. Descendants The SOIC (Small Outline IC), a surface-mount package which is currently very popular (in 2009), particularly in consumer electronics and personal computers, is essentially a shrunk version of the standard IC PDIP, the fundamental difference which makes it an SMT device being a second bend in the leads to flatten them parallel to the bottom plane of the plastic housing. The SOJ (Small Outline J-lead) and other SMT packages with "SOP" (for "Small Outline Package") in their names can be considered further relatives of the DIP, their original ancestor. Pin grid array (PGA) packages may be considered to have evolved from the DIP. PGAs with the same 0.1 inch pin centers as most DIPs were popular for microprocessors from the early-mid 1980s through the 1990s. Owners of personal computers containing Intel 80286 through P5 Pentium processors may be most familiar with these PGA packages, which were often inserted into ZIF sockets on motherboards. The similarity is such that a PGA socket may be physically compatible with some DIP devices, though the converse is rarely true. History The original Dual-in-line package was invented by Bryant "Buck" Rogers in 1964 while working for Fairchild Semiconductor. The first devices had 14 pins and looked much like they do today.[5] See also Flatpack (electronics) Single in-line package (SIP) Zig-zag in-line package (ZIP) Pin grid array (PGA) DIP switch QFP (Quad Flat Package) Chip carrier Chip packaging and package types list References ^ see for instance: [1] ^ http://www.computerhistory.org/semiconductor/timeline/1965-Package.html Computer Museum retrieved April 16, 2008 ^ For instance, Microchip: http://www.microchip.com/packaging ^ Kang, Sung-Mo; Leblebici, Yusuf (2002). CMOS digital integrated circuits (3rd Edition). McGraw-Hill. p. 42. ISBN 0072460539.  ^ Dummer, G.W.A. Electronic Inventions and Discoveries 2nd ed. Pergamon Press ISBN 0-08-022730-9 Intel (1996). Packaging. Mcgraw-hill Inc. ISBN 155512254X.   This article incorporates public domain material from the General Services Administration document "Federal Standard 1037C". External links Wikihowto: Guide to IC packages DIP packages documentation, photos and videos Wikimedia Commons has media related to: Dual inline packages v • d • e Early CPU sockets Other packages DIP • PLCC PGAs Socket 1 • Socket 2 • Socket 3 • Socket 4 • Socket 5 • Socket 6 • Socket 7